1. Field of the Invention
The present invention relates generally to a driver circuit. More particularly, the present invention relates to a digital driver circuit for an integrated circuit (IC), particularly for ICs where both analog and digital sub-circuits are disposed on a semiconductor substrate, wherein the digital driver circuit is capable of driving a variety of capacitive loads.
2. Description of the Prior Art
Driver circuits are used to drive subsequent load components which have capacitive elements. The capacitance of the load determines the current required to recharge the load. For large capacitances and fixed recharging times, a high current is necessary. Because of the inductances and resistances present in the circuit, a high recharging current causes interference voltages and dips in supply voltages, which corresponds to noise of the internal voltage supply and noise of the input signal, respectively. In addition, the noise increases with the number of recharging processes and the recharging speed.
In the case of an IC with a large number of digital outputs having high data rates, the interference caused by the input-signal noise is particularly strong. In addition, the capacitance of the load being driven by the driver circuit depends on the respective application, i.e., on the respective customer. Thus, the driver circuit must be designed to be used with different load capacitances. This makes it difficult to optimally match the current to the subsequent circuitry and precisely predetermine the output power of the driver circuit.
The driver circuit is commonly designed for the worst case load. The worst case load is the greatest load capacitance that can be used by any of the customers, and the shortest time required to recharge the load capacitance, e.g., in the case of high data rates. In that case, a high current is necessary, which results in relatively high input-signal noise. With this design, the driver circuit is adaptable for all applications, but in a more favorable case, the current will be unnecessary high, so that unnecessary noise will be produced. The current required in the best case may differ from that required in the worst case by a factor of 4, for example.
The reference DE 42 33 850 proposes a method for setting the current of an output stage of a driver circuit. By suitable current and voltage control, a time delay is achieved which results in a slower current rise. In this manner, very high current peaks are avoided. At very high data rates, however, this method cannot be used, because there is no time delay available to delay the current signals.
It is, therefore, an object of the present invention to provide a driver circuit for an integrated circuit which, even if the integrated circuit has a large number of digital outputs at high data rates, delivers different drive powers that are adapted to the respective application.